The present disclosure relates to processor management, and more specifically, to serial execution of instructions from non-serialized work sources with interlocked full area instructions.
Systems with multiple processors receive various work tasks that arrive each over multiple channels. Multiple processors are available to perform work, and each processor can be generating work that needs to be serialized. Each work task has a sequence number associated with it that is indicative of the relative order of its execution. The work tasks may not arrive in order at the processors, yet they must be processed in proper order. When work arrives, each processor is aware of the relative order, which is stated in a predetermined field containing a sequence number of the highest instruction (work task) value to be executed. Any particular work task cannot be executed until all preceding work task numbers are sequentially executed. If there is any delay in a previous work task, that delays all subsequent execution of the following work tasks. Consequently, since only one processor can be doing the serialized work at any particular time, no work can be missed or else a system stall may occur.